Modern day electronic systems demand very clean power and signal conditions due to high signal sensitivity. However, in practice, signal distortions, such as noise, signal glitches or timing mismatches, cannot be avoided due to the combination of different electronic components in a system, each with its own functionalities and logic complexities. Signal glitches are of particular concern as the glitches may be erroneously perceived as a valid input signal to the input circuit of a system. Signal glitches can be difficult to detect as the glitches are unpredictable and can be very narrow, such as nano or pico second pulse width.
Electronic systems often employ an Input Transition Detection (ITD) circuit, such as an address transition detector (ATD) or a data transition detector (DTD), following the input stage to detect for signal transitions on the input signal. However, these input transition detection circuits are susceptible to error when the input signal is distorted by glitches. The ITD circuit may recognize signal glitches as a valid input signal transition and erroneously assert a signal detection output.
FIG. 1 is a circuit diagram of a conventional input transition detection circuit. Referring to FIG. 1, an input transition detection circuit 20 typically includes a chain of inverters 1-8 receiving an input signal IN (node 14) and generating an output signal OUT1 (node 16). An additional inverter 9 is usually provided to help latch the input signal transitions. The output signal OUT1 is provided to an input transition detector 10 which detects a transition on the output signal and generates a detection pulse. The detection pulse is amplified, such as by an inverter 12, to generate the detection output signal ATD1 (node 18). In the conventional input transition detection circuit 20, input signal transitions are passed directly to the output signal OUT1. Thus, when glitches or signal distortions appear on the input signal IN, the input transition detector 10 may recognize the glitches as a valid signal transition. As a result, the detection output signal ATD1 may include erroneous detection pulses, such as causing multiple detection pulses to be generated when there is actually not a valid input transition.